1 DBP Disable 60x bus address and data parity generation. 0 The system generates address and data parity.

1Parity generation is disabled and parity signals are driven to 0 during bus operations. When parity generation is disabled, all parity checking should also be disabled and parity signals need not be connected.

Replace the description of HID0[BTIC] (bit 26), with the following:

26 BTIC BTIC enable. Used to enable use of the 64-entry branch instruction cache.

0The BTIC contents are invalidated and the BTIC behaves as if it were empty. New entries cannot be added until the BTIC is enabled.

1 The BTIC is enabled and new entries can be added.

2.1.2.4.5, 2-18 Replace Table 2-11 with the following:

Table 2-11. PMC2 Events???MMCR0[26???31] Select Encodings

Table 11-16. PMC2 Events???MMCR0[26???31] Select Encodings

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