TDA9964
1. Description
The TDA9964 is a
The PGA gain and the ADC input clamp level are controlled via the serial interface.
An additional DAC is provided for additional system controls; its output voltage range is 1.0 V
2. Features
???Correlated Double Sampling (CDS), Programmable Gain Ampli???er (PGA),
???Fully programmable via a
???Sampling frequency up to 30 MHz
???PGA gain range of 24 dB (in steps of 0.1 dB)
???Low power consumption of only 175 mW at 2.7 V
???Power consumption in standby mode of 4.5 mW (typ.)
???3.0 V operation and 2.5 to 3.6 V operation for the digital outputs
???All digital inputs accept 5 V signals
???Active control pulses polarity selectable via serial interface
???
???TTL compatible inputs, CMOS compatible outputs.
3. Applications
???
7.Pinning information
7.1Pinning
36 D11
35 D10
34 D9
33 D8
32 D7
31 D6
30 D5
29 D4
28 D3
27 D2
26 D1
25 D0
FCE516
Fig 2. Pin con???guration.
7.2 Pin description
8. Limiting values
Table 4: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]The supply voltages VCCA, VCCD and VCCO may have any value between ???0.3 and +7.0 V provided that the supply voltage difference VCC remains as indicated.
9. Thermal characteristics
10. Characteristics
Table 6: Characteristics
VCCA = VCCD = 3.0 V; VCCO = 2.7 V; fpix = 30 MHz; Tamb = 25 ??C; unless otherwise speci???ed.
black to white transition in 1 pixel with 98.5%
Vi recovery
speci???cation Objective
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IN
N
SHP
0.6 V
th(IN;SHP)
SHD
0.6 V
th(IN;SHD)
2.2V
CLK
BLK
tCDS(min)
2.2 V
tCDS(min)
0.6 V
tCLKH
0.6 V
td(SHD;CLK)
N ??? 3 50%
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Fig 3. Pixel frequency timing diagram; all polarities active HIGH.
speci???cation Objective
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Fig 4. Pixel frequency timing diagram; all polarities active LOW.
N + 5
ADC CLAMP
CODE
FCE518
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OFDOUT control DAC input code
Fig 5. DAC voltage output as a function of DAC input code.
Fig 6. Line frequency timing diagram.
PGA input code
Fig 7. Total gain from CDS input to ADC input as a function of PGA input code.
PGA code
Noise measurement at ADC outputs: Coupling capacitor at input is grounded, so only noise contribution of the
Fig 8. Typical total noise performance as a function of PGA gain.
Fig 10. Loading sequence of control input data via the serial interface.
11. Application information
VCCD VCCD
VCCA VCCO
(1)Pins SEN and VSYNC should be interconnected when the vertical sync signal is not available.
(2)Input signals IN, SHD and SHP must be adjusted to comply with timing signals th(IN;SHP) and th(IN;SHD) (see Section 10 ???Characteristics???).
Fig 11. Application diagram.
11.1 Power and grounding recommendations
When designing a
For the
The following additional recommendation is given for the CDS input pin(s) which is (are) internally connected to the programmable gain ampli???er:
The connections between CCD interface and CDS input should be as short as possible and a ground ring protection around these connections can be bene???cial. Separate analog and digital supplies provide the best solution. If it is not possible to do this on the board, the analog supply pins must be decoupled effectively from the digital supply pins. If the same power supply and ground are used for all the pins, the decoupling capacitors must be placed as closely as possible to the IC package.
To minimize the noise caused by package and die parasitics in a
All analog and digital supply pins must be decoupled to the analog ground plane. Only the ground pin associated with the digital outputs must be connected to the digital ground plane. All other ground pins should be connected to the analog ground plane. The analog and digital ground planes must be connected together at one point as closely as possible to the ground pin associated with the digital outputs.
The digital output pins and their associated lines should be shielded by the digital ground plane, which can then be used as return path for digital signals.
12. Package outline
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
13. Handling information
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be completely safe, it is desirable to take normal precautions appropriate to handling integrated circuits.
14.Soldering
14.1Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology. A more
There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for ???ne pitch SMDs. In these situations re???ow soldering is recommended.
14.2 Re???ow soldering
Re???ow soldering requires solder paste (a suspension of ???ne solder particles, ???ux and binding agent) to be applied to the
Several methods exist for re???owing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
Typical re???ow peak temperatures range from 215 to 250 ??C. The
14.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or
To overcome these problems the
If wave soldering is used the following conditions must be observed for optimal results:
???Use a
???For packages with leads on two sides and a pitch (e):
The footprint must incorporate solder thieves at the downstream end.
???For packages with leads on four sides, the footprint must be placed at a 45?? angle to the transport direction of the
During placement and before soldering, the package must be ???xed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time is 4 seconds at 250 ??C. A
14.4 Manual soldering
Fix the component by ???rst soldering two
When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 ??C.
14.5 Package related soldering information
Table 13: Suitability of surface mount IC packages for wave and re???ow soldering methods
[1]All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated
Circuit Packages; Section: Packing Methods.
[2]These packages are not suitable for wave soldering as a solder joint between the
[3]If wave soldering is considered, then the package must be placed at a 45?? angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners.
[4]Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is de???nitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
[5]Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is de???nitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
15. Revision history
Table 14: Revision history
16. Data sheet status
[1]Please consult the most recently issued data sheet before initiating or completing a design.
Limiting values de???nition ??? Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speci???cation is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information ??? Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the speci???ed use without further testing or modi???cation.
Life support ??? These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes ??? Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speci???ed.
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14.1Introduction to soldering surface mount
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